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Conference Program

Final papers can be viewed by clicking on the paper title.

Tuesday, September 9

OMG VSIPL (1pm-5pm) [Garfield]
Organizers: Hahn Kim & Stefan Seefield & Tony Skjellum

Tutorial: OpenVPX and Emerging Standards for Embedded Computing (9am-5pm) [Livermore]
Instructors: Mr. Greg Rocco (MIT); Mr. Patrick Collier (AFRL); Mr. Robert Normoyle (JHU)

Tutorial: Accumulo Database (9am-5pm) [Cambridge]
Instructors: Mr. Donald Miner, CTO ClearEdege IT Solutions

Tutorial: Julia Programming Language (9am-noon) [Alcott]
Instructor: Mr. Jeff Bezanson, MIT Computer Science & AI Laboratory

Tutorial: Programming TI DSPs (1pm-5pm) [Alcott]
Instructor: Dr. Murtaza Ali, High Performance Computing lead, Texas Instruments Embedded Processing Systems Lab

Wednesday, September 10 Morning

Extreme Computing Plenary Session (9:00-10:45) [Eden Vale B]
Chair: Bob Bond / MIT Lincoln Laboratory (9:00)

Keynote Speaker:

BlueDBM: A Hardware-accelerated Flash Platform for Big Data Analytics (9:15)
Prof. Arvind, MIT Computer Science & AI Laboratory

Invited Speakers:

Novel Memory Architectures (9:45)
Dr. Richard Murphy, Micron Senior Memory Architect

Computing with Neurosynaptic Cores (10:15)
Dr. John Arthur, IBM Research

Break (10:45-11:00)

Advanced Architectures (11:00-12:30) [Eden Vale A1]
Chair: Patrick Dreher / DRC

A Heterogeneous Computing System with Memristor-Based Neuromorphic Accelerators
Xiaoxiao Liu, Mengjie Mao, Hai Li, Yiran Chen, University of Pittsburgh
Hao Jiang, San Francisco State University
J. Joshua Yang, Hewlett Packard Labs
Qing Wu, US Air Force Research Lab; Mark Barnell, AFRL/RITB

Low-Overhead Hard Real-time Aware Interconnect Network Router
Michel A. Kinsy, Srinidas Devadas, MIT Computer Science & AI Laboratory
Presentation

Performance and Energy Limits of a Processor-integrated FFT Accelerator
Tung Thanh-Hoang, Amirali Shambayati, Calvin Deutschbein, Henry Hoffmann, Andrew Chien, University of Chicago

GPU (11:00-12:30) [Eden Vale A2]
Chair: Kurt Keville / MIT

Invited Talk:

SYCL - Integrated C++ and OpenCL
Maria Rovatsou, Codeplay

BelRed: Constructing GPGPU Graph Applications with Software Building Blocks
Shuai Che, Bradford Beckmann, Steven Reinhardt, AMD

An Investigation of Unified Memory Access Performance in CUDA
Raphael Landaverde, Tiansheng Zhang, Ayse Coskun, Martin Herbordt, Boston University

Mapping & Scheduling (11:00-12:30) [Eden Vale A3]
Chair: Sanjeev Mohindra / MIT Lincoln Laboratory

Lucas-Kanade Optical Flow Estimation on the TI C66x Digital Signal Processor
Fan Zhang, Yang Gao, Jason Bakos, University of South Carolina

A Multi-Tiered Optimization Framework for Heterogeneous Computing
Andrew Milluzzi, Justin Richardson, Alan George, Herman Lam, CHREC
Presentation

Dynamic Runtime Optimizations for Systems of Heterogeneous Architectures
Geoffrey Phi Tran, University of Southern California
Dong-In Kang, Stephen Crago, University of Southern California Information Sciences Institute
Presentation

Big Data (11:00-12:30) [Eden Vale C1]
Chair: Albert Reuther / MIT Lincoln Laboratory

Invited Talk:

Performance Models for Apache Accumulo: The Heavy Tail of a Shared-Nothing Architecture
Adam Fuch, Sqrrl

Achieving 100,000,000 Database Inserts Per Second Using Accumulo and D4M
Jeremy Kepner, William Arcand, David Bestor, Bill Bergeron, Chansup Byun, Vijay Gadepally, Matthew Hubbell, Peter Michaleas, Julie Mullen, Andrew Prout, Albert Reuther, Antonio Rosa, Charles Yee, MIT Lincoln Laboratory

Evaluating Accumulo Performance for a Scalable Cyber Data Processing Pipeline
Scott Sawyer, David O'Gwynn, MIT Lincoln Laboratory

Graphs (11:00-12:30) [Eden Vale C2]
Chair: David Cousins / BBN

Real Time Change Point Detection by Incremental PCA in Large Scale Sensor Data
Dmitry Mishin, Kieran Brantner-Magee, Ferenc Czako, Alexander Szalay, Johns Hopkins University

Quantifying the Effect of Matrix Structure on Multithreaded Performance of the SpMV Kernel
Daniel Kimball, Elizabeth Michel, MIT Lincoln Laboratory
Paul Keltcher, AMD
Michael Wolf, Sandia

Scalable and Dynamically Updatable Lookup Engine for Decision-trees on FPGA
Yun Qu, Viktor Prasanna, University of Southern California
Presentation

Multicore Software (11:00-12:30) [Eden Vale C3]
Chair: Doug Enright / Aerospace Corporation

A Performance Model of Fast 2D-DCT Parallel JPEG Encoding Using CUDA GPU and SMP-Architecture
Mohammed Shatnawi, University of Ottawa
Hussien Ali Shatnawi, SAU University
Presentation

A System-Level Optimization Framework for High-Performance Networking
Thomas Benson, Georgia Tech Research Institute
Presentation

Low-overhead Load-balanced Scheduling for Sparse Tensor Computations
Muthu Baskaran, Benoit Meister, Richard Lethin, Reservoir Labs
Presentation

Lunch; View Posters [Emerson] and Demos [Ballroom Foyer] (12:30-1:30)

Memory Access Optimized Routing Scheme for Deep Networks on a Mobile Coprocessor
Aysegul Dundar, Jonghoon Jin, Vinayak Gokhale, Berin Martini, Eugenio Culurciello, Purdue University

Using 3D Printing to Visualize Social Media Big Data
Zachary Weber, Vijay Gadepally, MIT Lincoln Laboratory

Hardware as a Service - Enabling Dynamic, User-level Bare Metal Provisioning of Pools of Data Center Resources
Ian Denhardt, Boston University
Chris Hill, MIT EAPS
Jason Hennessey, Boston University
Abhishek Raju, Viggnesh Venugopal, Northeastern University
Jon Bell, Orran Krieger, Boston University
Peter Desnoyers, Northeastern University

Processor Building Blocks for Space Applications
John Holland, Jeremy Horner, Max Corbin, Eliot Glaser, Gary Petrosky, Northrop Grumman

Pulsed Doppler Radar Target Recognition Based on Micro-Doppler Signatures Using Wavelet Analysis
Vinit Kizhakkel, Rajiv Ramnath, Anish Arora, Ohio State University
Ashok Krishnamurthy, University of North Carolina
Kenneth Parker, Samraksh Company

Real-Time Traffic Sign Detection and Recognition Using GPU
Zhilu Chen, Xinming Huang, Worcester Polytechnic Inistitute

An FPGA Operating System to Allow Superior Implementation of High Throughput Event-Based DSP Algorithms
Bo Marr, Dan Thompson, Bill Noble, Jeff Caldwell, Ray Hsu, Raytheon

Be Kind, Rewind - Checkpoint & Restore Capability for Improving Reliability of large-scale Semiconductor Design
Igor Ljubuncic, Ravi Giri, Avikam Rozenfeld, Andrew Goldis, Intel

Wednesday, September 10 Afternoon

Storage (1:30-3:00) [Eden Vale A1]
Chair: Albert Reuther / MIT Lincoln Laboratory

Enterprise HPC storage systems - Advanced Tuning of Lustre Clients
Torben Kling Petersen, John Fragalla, Xyratex

Wrapping Operations for Atomicity and Durability: A Position Paper on How to Simplify NVM Programming for Extreme Performance
Ellis Giles, Rice University
Kshitij Doshi, Intel
Peter Varman, Rice University

Effective Method for Coding and Decoding RS Codes Using SIMD Instructions
Sergei Platonov,RAIDIX LLC
Alexei Marov, St.Petersburg State University
Presentation

GPU (1:30-3:00) [Eden Vale A2]
Chair: James Lebak / Mathworks

Multifrontal Computations on Accelerators
Gene Wagenbreth, Robert Lucas, University of Southern California Information Sciences Institute

Synthetic Aperture Radar Imaging on a CUDA-enabled Mobile Platform
Massimiliano Fatica, Everett Phillips, NVIDIA
Presentation

Utilizing Graphics Processing Units for Rapid Facial Recognition Using Video Input
Charles Gala, Raj Acharya, Pennsylvania State University
Bruce Einfalt, Applied Research Laboratory
Presentation

Mapping & Scheduling (1:30-3:00) [Eden Vale A3]
Chair: Sanjeev Mohindra / MIT Lincoln Laboratory

Algorithms for Scheduling Task-based Applications onto Heterogeneous Many-core Architectures
Michel Kinsy, Srinivas Devadas, MIT Computer Science & AI Laboratory
Presentation

Sparse Matrix-Vector Multiply on the Keystone II Digital Signal Processor
Yang Gao, Fan Zhang, Jason Bakos, University of South Carolina

Big Data (1:30-3:00) [Eden Vale C1]
Chair: Patrick Dreher / MIT

SOCRATES: A System For Scalable Graph Analytics
Cetin Savkli, James Carr, Brant Chee, D Minch
Johns Hopkins University Applied Physics Laboratory
Presentation

Big Data Dimensional Analysis
Vijay Gadepally, Jeremy Kepner, MIT Lincoln Laboratory

A Test-Suite Generator for Database Systems
Ariel Hamlin, Jonathan Herzog, MIT Lincoln Laboratory

Graphs (1:30-3:00) [Eden Vale C2]
Chair: Martin Herbordt / Boston University

Sparse Matrix Partitioning for Parallel Eigenanalysis of Large Static and Dynamic Graphs
Michael Wolf, Sandia National Laboratories
Benjamin Miller, MIT Lincoln Laboratory

GasCL: A Vertex-Centric Graph Model for GPUs
Shuai Che, Advanced Micro Devices

Extreme SAT-based Constraint Solving with R-Solve
James Ezick, Jonathan Springer, Tom Henretty, Reservoir Labs
Chanseok Oh, New York University

Multicore Software (1:30-3:00) [Eden Vale C3]
Chair: Doug Enright / Aerospace Corporation

Programming TI KeyStone II-based ARM + DSP Devices using Industry Standard Tools
Ellen Blinka, Texas Instruments
Presentation

Benchmarking Porting Costs of the SKYNET High Performance Signal Processing Middleware
Michael Linnig, Gary Suder, Raytheon
Presentation

Break (3:00-3:30)

Panel: Autonomous Systems (3:30-5:30) [Eden Vale B]
Chair: Ken Gregson / MIT

Panelists: R. Some (NASA), R. Tedrake (MIT), C. Ippolito (NASA), N. Armstrong-Cruz (MIT)

Invited Talks

HPC in Space
Mr. Raphael Some NASA Jet Propulsion Laboratory

Computational Challenges for Autonomous Robots: From Humanoid Rescue Robots to Fast Unmanned Aerial Vehicles
Prof. Russ Tedrake MIT Computer Science & AI Lab

High Performance Computing for future NASA Airborne Earth Science Missions
Mr. Corey Ippolito NASA AMES Intelligent Systems Division

Reception; View Posters [Emerson] and Demos [Ballroom Foyer]; Attend BoFs [Eden Vale] (5:30-8:00)

BOFs

HPEC Standards BoF (6:00-7:00) [Eden Vale A1]

MGHPCC BoF (6:00-7:00) [Eden Vale A2]
Chair: Chris Hill / MIT EAPS

OpenSoC BoF (6:00-7:00) [Eden Vale A3]
Chair: Kurt Keville / MIT ISN

Accumulo BoF (6:00-7:00) [Eden Vale C2]
Chair: Adam Fuchs / Sqrrl

GraphBLAS BoF (6:00-7:00) [Eden Vale C2]
Chair: Timothy Mattson / Intel

Demos

AHA Products Group
Allinea Software
Argyle Data
BittWare
GE Intelligent Platforms
MIT ISN
Praesum Supercomputing
SC14 Massachusetts Green Team
SpiralGen, Inc.
Sqrrl
TeraDeep / Purdue University

Thursday September 11 Morning

Extreme Applications Plenary Session (9:00-10:45) [Eden Vale B]
Chair: Dr. Albert Reuther / MIT Lincoln Laboratory (9:00)

Keynote Speaker:

Clinical Informatics - The Practice of Medicine Based Upon Data (9:15)
Dr. Charles Safran, Beth Israel Deaconess & Harvard Medical School

Invited Talks:

The Road to Precision Medicine is Paved with Data (9:45)
Prof. John Quackenbush, Dept. of Biostatistics, Harvard University

Big Challenges for Big Data: Usability, Math library integration, and Unified "query" Abstractions (10:15)
Dr. Timothy Mattson Intel Principal Investigator for Big Data

Break (10:45-11:00)

ASIC & FPGA (11:00-12:3) [Eden Vale A1]
Chair: Viktor Prasanna / USC

Energy Optimizations for FPGA-based 2-D FFT Architecture
Ren Chen, Viktor Prasanna, University of Southern California
Presentation

Energy- and Area-Efficient Parameterized lifting-based 2-D DWT Architecture on FPGA
Yusong Hu, Viktor Prasanna, University of Southern California
Presentation

Accelerating SAR Processing on COTS FPGA Hardware Using C-to-Gates Design Tools
Raymond Hoare, Concurrent EDA
Denis Smetana, Curtiss-Wright

GPU (11:00-12:30) [Eden Vale A2]
Chair: James Lebak / Mathworks

Evaluating Latency and Throughput bound Acceleration of FPGAs and GPUs for Adaptive Optics Algorithms
Vivek Venugopalan, United Technologies

Embedded Real-time HD Video Deblurring
Timothy Dysart, Jay Brockman, Emu Solutions
Stephen Jones, Fred Bacon, Aerodyne Research
Presentation

High-Performance Packet Classification on GPU
Shijie Zhou, Shreyas Singapura, Viktor Prasanna, University of Southern California
Presentation

Benchmarking (11:00-12:30) [Eden Vale A3]
Chair: Dan Campbell / GTRI

The Parallel Research Kernels: A tool for architecture and programming system investigation
Timothy Mattson, Rob Van der Wijngaart, Intel

A Case Study of OpenCL on an Android Mobile GPU
James Ross, Dynamics Research
David Richie, Brown Deer Technology
Song Park, Dale Shires, Army Research Laboratory

An Evaluation of Lazy Fault Detection based on Adaptive Redundant Multithreading
Saurabh Hukerikar, USC Information Sciences Institute
Keita Teranishi, Sandia National Laboratories
Pedro Diniz, Robert Lucas, USC Information Sciences Institute

Accelerating Health (11:00-12:30) [Eden Vale C1]
Chair: Nirmal Keshava / AstraZeneca

GPU Optimizations for a Production Molecular Docking Code
Martin Herbordt, Raphael Landaverde, Boston University

Characterization of Semi-Synthetic Dataset for Big-Data Semantic Analysis
Robert Techentin, Daniel Foti, Mayo Clinic
Sinan Al-Saffar, Semantic Scale
Peter Li, Erik Daniel, Barry Gilbert, David Holmes, Mayo Clinic

Accelerating Protein Coordinate Conversion using GPUs
Miriam Leeser, Mahsa Bayati, Jay Bardhan, Northeastern University
David King, University of Rochester

HPEC Online - Massive Open Online Courses (11:00-12:30) [Eden Vale C2]
Chair: Craig Lund / Local Knowledge

Invited Talks

Massive Open Online Courses (MOOCs)
Prof. Isaac Chuang, MIT Dept. of Physics

MATLAB for MOOCs
Mr. Todd Atkins, Mathworks

Secure Systems (11:00-12:30) [Eden Vale C3]
Chair: Joshua Kramer / MIT Lincoln Laboratory

Computing on Masked Data: a High Performance Method for Improving Big Data Veracity
Jeremy Kepner, Vijay Gadepally, Peter Michaleas, Nabil Schear, Mayank Varia, Arkady Yerukhimovich, Robert Cunningham, MIT Lincoln Laboratory

Accelerating NTRU based Homomorphic Encryption using GPUs
Wei Dai, Yarkin Doroz, Berk Sunar, Worcester Polytechnic Institute
Presentation

A Chaos-Based Multiple-Loop Keyed Hash Function for Secure Message Authentications
Wimol San-um, Wattapong Ruamtham, Patinya Ketthong, Thai-Nichi Institute of Technology

Lunch; View Posters [Emerson] and Demos [Ballroom Foyer] (12:30-1:30)

Posters

Optimized Three-Dimensional Stencil Computation on Fermi and Kepler GPUs
Anamaria Vizitiu, Lucian Itu, Transilvania University of Brasov
Constantin Suciu, Siemens

A Digital Image Encryption using Robust Absolute-Value Chaotic Map for Image Storage in Clound Computing System
Wimol San-um, Wattapong Ruamtham, Thai-Nichi Institute of Technology

A Cost-Effective True Random Bit Generator using a Pair of Robust Signum-Based Chaotic Maps
Wimol San-um, Wattapong Ruamtham, Patinya Ketthong, Thai-Nichi Institute of Technology

A Cost-Effective Data Acquisition System for Acoustic Emission Sensor using Variable Gain Preamplifier and STM32F4 Microcontroller Interface
Wimol San-um, Wattapong Ruamtham, Thai-Nichi Institute of Technology

The Multi-DSP Virtual Single-node Parallel Scheduling Method for SAR Imaging
Zhao Jiayun, Ye Jin, Feng Liu, Beijing Institute of Technology

Parallel Processing of High resolution SAR imaging based on NVIDIA K20c GPU
Ye Jin, Feng Liu, Yao Chengxiang, Beijing Institute of Technology

Design of a High-speed and large-capacity NAND Flash storage system based on Fiber Acquisition
Qing Li, Shanqing Hu, Teng Long, Feng Liu, Beijing Institute of Technology

Design and Implementation of High-Performance Embedded Processing System Based on DSM
Yang Feng, Shanqing Hu, Teng long, Feng Liu, Beijing Institute of Technology

An Efficient FFT-Mapping Method Based on Cache Optimization
Zhu Liang, Liu Tengfei, Gao Lining, Liu Feng, Jin Ye, Beijing Institute of Technology

Thursday September 11 Afternoon

ASIC & FPGA (1:30-3:00) [Eden Vale A1]
Chair: Viktor Prasanna / USC

Design of 3D FFTs with FPGA Clusters
Martin Herbordt, Jiayi Sheng, Hansen Zhang, Boston University
Benjamin Humphries, Advanced Micro Devices

FPGA-Based Latency-Insensitive OFDM Pipeline for Wireless Research
James Chacko, Cem Sahin, Danh Nguyen, Doug Pfeil, Nagarajan Kandasamy, Kapil Dandekar, Drexel University

Energy-Efficient Histogram Equalization on FPGA
Andrea Sanny, University of Southern California
Yi-Hua Yang, Xilinx Inc
Viktor Prasanna, University of Southern California
Presentation

Rising Stars - Sponsored by The MITRE Corporation (1:30-3:00) [Eden Vale A2]
Chair: Brian Sroka / The MITRE Corporation

Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory
Fazle Sadi, Berkin Akin, Doru Popovici, James Hoe, Larry Pileggi, Franz Franchetti. Carnegie Mellon University

Dynamic Reconfiguration of Silicon Photonic Circuit Switched Interconnection Networks
David Calhoun, Ke Wen, Xiaoliang Zhu, Sebastien Rumley, Keren Bergman, Columbia University
Lian-Wee Luo, Michal Lipson, Cornell University
Yang Liu, Ran Ding, Tom Baehr-Jones, Michael Hochberg, University of Delaware

Optimizing Energy Consumption and Parallel Performance for Static and Dynamic Betweenness Centrality using GPUs
Adam McLaughlin, Jason Riedy, David Bader, Georgia Tech
Presentation

Benchmarking (1:30-3:00) [Eden Vale A3]
Chair: Dan Campbell / GTRI

Optimization and Evaluation of Image- and Signal-Processing Kernels on the TI C6678 Multi-Core DSP
Barath Ramesh, CHREC
Asheesh Bhardwaj, Texas Instruments
Justin Richardson, Alan George, Herman Lam, CHREC
Presentation

Energy Performance of FPGAs on PERFECT Suite Kernels
Sanmukh Kuppannagari, Ren Chen, Andrea Sanny, Shreyas Singapura, Geoffrey Phi Tran, Shijie Zhou, Yusong Hu, University of Southern California
Stephen Crago, USC Information Sciences Institute
Viktor Prasanna, University of Southern California
Presentation

High Level Programming of FPGAs for HPC and Data Centric Applications
Oren Segal, Nasibeh Nasiri, Martin Margala, University of Massachusetts Lowell
Wim Vanderbauwhede, University of Glasgow

Accelerating Health (1:30-3:00)[Eden Vale C1]
Chair: Nirmal Keshava / AstraZeneca

Real-Time Lane Departure and Front Collision Warning System on an FPGA
Jin Zhao, Bingqian Xie, Xinming Huang, Worcester Polytechnic Inistitute

GPGPU Parallelization of Self-Calibrating Agent-Based Influenza Outbreak Simulation
Peter Holvenstot, Diana Prieto, Western Michigan University

A GPU Accelerated Virtual Scanning Confocal Microscope
James Kingsley, Zhilu Chen, Jeffrey Bibeau, Luis Vidali, Xinming Huang, Erkan Tuzel, Worcester Polytechnic Inistitute
Presentation

Graphs (1:30-3:00) [Eden Vale C2]
Chair: Franz Franchetti / CMU

Building Blocks for Graph Based Network Analysis
Sanjukta Bhowmick, Vladimir Ufimtsev, University of Nebraska Omaha
Sivasankaran Rajamanickam, Sandia National Laboratories

Fast Parallel Algorithm For Unfolding Of Communities In Large Graphs
Charith Wickramaarachchi, Marc Frincu, Patrick Small, Viktor Prasanna, University of Southern California
Presentation

Real-Time Streaming Intelligence: Integrating Graph and NLP Analytics
David Ediger, Darren Appling, Erica Briscoe, Robert McColl, Jason Poovey, Georgia Tech

Secure Systems (1:30-3:00) [Eden Vale C3]
Chair: Sharon Sacco / JES&A

A Survey of Cryptographic Approaches to Securing Big-Data Analytics in the Cloud
Sophia Yakoubov, Vijay Gadepally, Nabil Schear, Emily Shen, Arkady Yerukhimovich, MIT Lincoln Laboratory

Lockless Hash Tables with Low False Negatives
Jordi Ros-Giralt, Alan Commike, Robert Rotsted, Patrick Clancy, Ann Johnson, Richard Lethin, Reservoir Labs

An FPGA Coprocessor Implementation of Homomorphic Encryption
David Cousins, Kurt Rohloff, Daniel Sumorok, John Golusky, BBN Technologies

Break (3:00-3:30)

Best Paper Awards (3:30-5:30) [Eden Vale B]]
Chair: Dr. Jeremy Kepner / MIT Lincoln Laboratory

Adiabatic Quantum Computing for Finding Low-Peak-Sidelobe Codes
Gregory Coxson, Naval Research Laboratory
Jon Russo, Connie Hill, Lockheed Martin

Efficient Extraction of High Centrality Vertices in Distributed Graphs
Alok Gautam Kumbhare, Marc Frincu, Viktor Prasanna, Cauligi Raghavendra, University of Sourthern California

Winner of Best Paper Award

Genetic Sequence Matching Using D4M Big Data Approaches - Winner of Best Paper Award
Stephanie Dodson, Brown University
Darrell Ricke, Jeremy Kepner, MIT Lincoln Laboratory

HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM - Winner of Best Paper Award
Berkin Akin, James Hoe, Franz Franchetti, Carnegie Mellon